Google has quietly become a semiconductor vendor. In the second quarter of 2026, Google Cloud began recognizing revenue from sales of its custom Tensor Processing Unit (TPU) systems, marking the first time the company has sold its in-house AI chips as standalone hardware products rather than offering them exclusively through cloud rentals.
The development, disclosed during Alphabet’s Q2 earnings call, signals a strategic shift that could reshape the competitive landscape for AI accelerators and create new opportunities across the semiconductor supply chain.
For investors watching the AI infrastructure race, the move raises a central question: which publicly traded companies are positioned to benefit from Google’s expanding TPU ecosystem, and what risks should they understand before drawing conclusions?
Google’s TPUs are custom-designed AI accelerators that the company has developed since 2015. Unlike general-purpose graphics processing units (GPUs), which can handle a wide range of computing tasks, TPUs are purpose-built to accelerate machine learning workloads.
For years, Google used TPUs primarily for internal workloads — powering search, YouTube recommendations, and eventually its Gemini AI models. The company also offered TPU access to external developers through Google Cloud, but it did not sell the chips as standalone products.
That changed in 2026. Google Cloud started shipping TPU systems directly to customer data centers in Q2, according to CFO Anat Ashkenazi, who said the company expects “the vast majority of the revenues from these agreements will be realized in 2027.”
The strategic rationale is straightforward: Google has invested tens of billions in AI infrastructure, and selling TPU systems expands its total addressable market beyond cloud services. Ashkenazi described the shift as “an expansion of our total addressable market.”
A Tensor Processing Unit is a specialized chip designed to perform the matrix multiplications and other mathematical operations that underpin modern AI models. Google describes TPUs as the foundation of its AI hypercomputer infrastructure.
The company divides its TPU lineup into two categories: training chips (designated with a “t”) and inference chips (designated with an “i”). In April 2026, Google unveiled its eighth-generation TPUs — the TPU 8t for large-scale training and the TPU 8i for low-latency inference.
The TPU 8i, which entered mass production in late 2026, delivers up to 80% better performance per dollar than the previous-generation Ironwood chip, according to Google. Broadcom confirmed during its September 2026 earnings call that it had begun production shipments of the TPU 8i, with plans to “significantly expand mass shipments in the fourth quarter.”
These chips matter because AI models require enormous amounts of computing power. Training a frontier model like Gemini involves processing vast datasets across thousands of chips simultaneously, while inference — the process of generating responses to user queries — requires fast, efficient computation at scale.
Google’s decision to sell TPU systems reflects several converging pressures.
First, demand for AI compute has outstripped Google’s internal capacity. The company has signed agreements to lease third-party data center space, including a reported $920 million monthly deal with SpaceXAI, and has limited competitors’ access to its AI models due to resource constraints.
Second, custom chips offer a cost advantage. Google estimates that its TPUs can handle AI workloads at up to 30% total cost savings compared to chips from other hyperscalers, because the processors are designed specifically for how Gemini processes information.
Third, selling TPUs directly creates a new revenue stream. Google Cloud’s revenue surged 82% to $24.8 billion in Q2 2026, and TPU system sales contributed to that growth.
Alphabet is the parent company of Google and the primary beneficiary of the TPU strategy. Google Cloud’s integrated stack — combining TPUs, data center infrastructure, and AI models — gives Alphabet a differentiated offering in the cloud market.
Alphabet raised its 2026 capital expenditure guidance to $195–$205 billion, partly to scale TPU production and deployment. CEO Sundar Pichai has outlined a TPU allocation strategy that prioritizes frontier AI development, cloud customer demand, and internal consumer and enterprise use cases.
The financial impact of TPU sales will depend on adoption rates, manufacturing costs, and execution. Alphabet’s cloud backlog reached $514 billion, with TPU system sales included in that figure.
Broadcom is Google’s primary TPU design partner. In April 2026, the two companies signed a long-term agreement for Broadcom to develop and supply future generations of custom TPUs and networking components through 2031.
Broadcom’s role extends beyond chip design. The company also supplies the networking components used in Google’s AI racks, making it a critical link in the TPU supply chain.
However, Google has begun diversifying its supplier base. In August 2026, Marvell Technology secured a deal to help Google develop custom AI chips, with Google receiving an option to acquire up to a $12.2 billion stake in Marvell. Broadcom’s stock dropped 5.4% on the news, reflecting investor concern about the company’s previously exclusive position.
Analysts at Bernstein noted that overall demand for custom AI hardware exceeds manufacturing capacity, suggesting both Broadcom and Marvell could grow even as Google multisources its TPU programs.
Marvell’s deal with Google, reported in August 2026, represents a significant expansion of its custom silicon business. The agreement could generate roughly $120 billion in revenue for Marvell through fiscal 2033, according to Reuters.
The structure of the deal — with Google earning shares as it purchases products — aligns incentives between the two companies and gives Google a reason to direct future orders to Marvell alongside Broadcom.
Taiwan Semiconductor Manufacturing Company remains the primary foundry for Google’s TPU chips. Google CTO Amin Vahdat visited Taiwan in September 2026 to line up manufacturing partners for next-generation TPU servers, and reports indicate that TSMC will produce the main computing engine for future TPU generations.
TSMC’s advanced packaging technology, known as CoWoS-L, is critical for integrating high-bandwidth memory with TPU logic dies. Even as Google diversifies some component manufacturing, TSMC’s position in advanced logic and packaging remains central to the TPU supply chain.
Google is reportedly in talks with Samsung to manufacture a memory interface component for a future TPU generation codenamed “Icefish,” using Samsung’s 2-nanometer process. While TSMC would still produce the main computing engine, Samsung’s potential involvement reflects TSMC’s capacity constraints and Google’s desire to diversify.
Samsung already supplies a significant portion of the high-bandwidth memory used in Google’s TPUs, reportedly 61% of HBM volume as of 2025.
Reports suggest Google may be working with AMD on the development of a 10th-generation TPU, potentially integrating CPU cores within the TPU package for reinforcement learning and agentic workloads. If confirmed, this would mark AMD’s first major custom AI ASIC engagement.
The competitive dynamic between Google TPUs and Nvidia GPUs is more nuanced than a simple rivalry.
Nvidia’s GPUs remain the dominant platform for AI training and inference, with an estimated market share above 86% in AI data centers. Nvidia’s CUDA software ecosystem, which has been developed over more than a decade, creates significant switching costs for developers and enterprises.
Google’s TPUs offer an alternative for workloads that can be optimized for its architecture. Citadel Securities reported that some of its operations ran four times faster on TPUs with approximately 30% cost savings.
However, TPUs are not a drop-in replacement for GPUs. They require code adaptation and are best suited for specific workloads. Google itself uses both TPUs and GPUs, acknowledging that each has strengths.
Google’s AI infrastructure leader has described the competition not as a “win-lose game,” noting that global demand for AI compute continues to grow strongly.
Google’s TPU strategy reflects a broader trend: hyperscale cloud providers are increasingly designing their own AI accelerators rather than relying exclusively on Nvidia GPUs.
Amazon has developed Trainium and Inferentia chips. Microsoft has its Maia accelerators. Meta has MTIA. This shift toward custom silicon creates demand for a different set of semiconductor capabilities — chip design services, advanced packaging, high-bandwidth memory, and networking components.
The custom AI accelerator market is expanding rapidly. TrendForce notes that Google’s TPU roadmap now includes multiple suppliers across different generations, with Broadcom, MediaTek, Marvell, and potentially AMD competing for design wins.
The expansion of Google’s TPU business could create demand across several segments of the semiconductor supply chain.
Chip design and IP: Companies with custom silicon expertise, like Broadcom and Marvell, could see increased opportunities as hyperscalers expand their accelerator programs.
Foundry and manufacturing: TSMC and Samsung are positioned to benefit from higher volumes of AI chip production, though capacity constraints remain a limiting factor.
Memory: High-bandwidth memory suppliers, including Samsung, SK Hynix, and Micron, could see demand grow as TPU systems require substantial HBM capacity.
Packaging and testing: Advanced packaging technologies like TSMC’s CoWoS and Intel’s EMIB are critical for integrating chiplets and memory into AI accelerators.
Networking: Broadcom’s supply agreement with Google includes networking components for AI racks, highlighting the importance of high-speed interconnects in AI infrastructure.
Investors should note that these opportunities come with significant risks. Customer concentration is a particular concern: a company heavily dependent on a single hyperscaler for custom chip revenue faces greater business risk if that customer changes suppliers or reduces spending.
AI spending risk. Cloud providers’ capital expenditure plans could change if AI revenue growth slows or if return on investment disappoints.
Customer concentration. Semiconductor companies with large exposure to a small number of hyperscale customers face revenue volatility risk.
Competition. Nvidia, AMD, and other custom-chip programs from Amazon, Microsoft, and Meta create competitive pressure across the AI accelerator market.
Technology risk. AI hardware evolves rapidly, and today’s leading architecture could be displaced by a more efficient design.
Valuation risk. Strong business fundamentals do not automatically mean a stock is attractively valued. Semiconductor stocks often trade at premium multiples that reflect high growth expectations.
Capital expenditure risk. Google’s TPU strategy depends on continued investment in data centers and manufacturing capacity. Changes in spending plans could affect suppliers.
Supply chain risk. Advanced semiconductor manufacturing, packaging, and memory remain constrained. Capacity limitations could affect shipment timelines and revenue recognition.
The AI hardware market extends far beyond a single chip company. Understanding the full stack helps clarify why Google’s TPU strategy matters across the semiconductor ecosystem:
AI model → cloud infrastructure → accelerator → networking → memory → advanced packaging → semiconductor manufacturing → data center
Google’s TPU expansion touches each layer. The company designs the chips (accelerator), relies on Broadcom for design partnership and networking components, uses TSMC for manufacturing and advanced packaging, sources HBM from Samsung and others, and deploys systems in data centers operated by Google or its customers.
This interconnectedness means that developments in Google’s TPU business can have ripple effects across multiple companies and market segments.
Google’s custom AI chips are called Tensor Processing Units (TPUs). They are specialized accelerators designed to handle machine learning workloads more efficiently than general-purpose chips for certain tasks.
A TPU, or Tensor Processing Unit, is an application-specific integrated circuit developed by Google to accelerate AI computations. Google has developed TPUs since 2015 and released its eighth generation in 2026.
Broadcom is Google’s primary design partner for TPUs, under an agreement extending through 2031. TSMC manufactures the main computing dies, while Samsung may supply certain components.
Yes. Broadcom has a long-term agreement to develop and supply custom TPUs and networking components for Google’s AI racks through 2031.
Google’s TPUs offer an alternative to Nvidia GPUs for certain AI workloads. However, Nvidia remains the dominant AI accelerator provider, and Google uses both TPUs and GPUs in its infrastructure.
Google develops TPUs to improve efficiency and reduce costs for its AI workloads. Custom chips designed for specific models can deliver better performance per dollar than general-purpose alternatives.
Broadcom, TSMC, Samsung, Marvell, and potentially AMD have documented connections to Google’s TPU supply chain or design programs.
Yes. AI semiconductor stocks face risks including customer concentration, rapid technology changes, competition, valuation sensitivity, and dependence on continued AI infrastructure spending.
Key developments include Alphabet earnings, Broadcom and Marvell earnings, TPU adoption announcements, semiconductor capital expenditure trends, and competitive moves from Nvidia and AMD.
Yes. The shift toward custom AI accelerators affects demand for chip design services, foundry capacity, advanced packaging, high-bandwidth memory, and networking components.